A power-on reset circuit provides a reset signal to initialize various components of a circuit when power is applied to the circuit. Typically, some circuit components, including logic elements and flip-flops, require a certain amount of time to reach a stable operating condition (i.e., to "settle") after receipt of a reset signal. Hence it is important to maintain the reset signal at a first selected level for a selected period of time sufficient to allow the circuit components to settle. After this selected period of time the reset signal is maintained at a second selected level as long as power is applied to the circuit.
The power supplies used for an integrated circuit have various rise times and it is therefore desirable to provide a CMOS power-on reset circuit which provides a delay period sufficient to allow circuit components to settle whether the rise time of the power supply is slow or extremely fast.